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Verilog MCP Server
@kaiwenyu147369
Generate Verilog testbenches, lint RTL code (7 rules), and scaffold UVM verification environments — directly inside Claude Code via MCP.
概要
What is Verilog MCP Server?
Verilog MCP Server is an MCP (Model Context Protocol) server that provides three tools for Verilog hardware design and verification: testbench generation, static lint checking, and UVM environment generation. It is
