What is MCP‑EDA Example Flow?
MCP‑EDA Example Flow is an end‑to‑end digital implementation reference that combines Synopsys Design Compiler for RTL‑to‑gate synthesis and Cadence Innovus for physical implementation, wrapped in lightweight Python/FastAPI micro‑services and automation scripts. It is intended for chip designers who want a fully scripted, version‑controlled, and repeatable RTL‑to‑GDS flow.
How to use MCP‑EDA Example Flow?
Install the prerequisites (Synopsys Design Compiler V‑2023.12‑SP2, Cadence Innovus 21.1, Python 3.9+, and FreePDK45). Run ./run_pipeline.sh to execute all eight stages in sequence, or manually start individual REST servers on ports 3333‑3340 and send POST requests to their /run endpoints with JSON parameters. Configuration is managed via CSV files in the config/ directory.
Key features of MCP‑EDA Example Flow
- Single‑command pipeline runs all stages from setup to save.
- Each stage is a stateless, idempotent REST micro‑service.
- All tunable parameters live in CSV files under version control.
- QOR metrics are collected and returned as JSON for CI pipelines.
- Supports reuse for custom designs by adding RTL and minimal config.
Use cases of MCP‑EDA Example Flow
- Automated RTL‑to‑GDS synthesis and place‑and‑route with one command.
- Debugging or tuning individual steps (e.g., placement) via direct REST calls.
- Exploring parameter sweeps by modifying CSV rows and rerunning affected stages.
- Adapting the flow to a new design by placing RTL and editing a single config.tcl.
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